Espressif Systems /ESP32-S3 /SPI0 /DATE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DATE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SPI_SMEM_SPICLK_FUN_DRV 0SPI_FMEM_SPICLK_FUN_DRV 0 (SPI_SPICLK_PAD_DRV_CTL_EN)SPI_SPICLK_PAD_DRV_CTL_EN 0DATE

Description

SPI0 version control register

Fields

SPI_SMEM_SPICLK_FUN_DRV

The driver of SPI_CLK PAD is controlled by the bits SPI_SMEM_SPICLK_FUN_DRV[1:0] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to external RAM.

SPI_FMEM_SPICLK_FUN_DRV

The driver of SPI_CLK PAD is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] when the bit SPI_SPICLK_PAD_DRV_CTL_EN is set and MSPI accesses to flash.

SPI_SPICLK_PAD_DRV_CTL_EN

SPI_CLK PAD driver control signal. 1: The driver of SPI_CLK PAD is controlled by the bits SPI_FMEM_SPICLK_FUN_DRV[1:0] and SPI_SMEM_SPICLK_FUN_DRV[1:0]. 0: The driver of SPI_CLK PAD is controlled by the bits IO_MUX_FUNC_DRV[1:0] of SPICLK PAD.

DATE

SPI register version.

Links

() ()